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{| cellpadding="7" style="max-width: 400px; width: 100%; border: 2px solid #6B4E9B; border-collapse: collapse; font-size: 0.9em;" |- | colspan="2" style="background: #6B4E9B; text-align: center; padding: 10px 8px 12px 8px; border-bottom: 2px solid #6B4E9B;" | <div style="color: #ffffff; font-size: 0.82em; letter-spacing: 0.08em;">COMPUTER MEMORY</div> <div style="color: #ffffff; font-weight: bold; font-size: 1.4em; margin: 3px 0 1px 0;">Flash memory</div> |- | colspan="2" style="text-align: center; padding: 0;" | ![[flash_memory_chips.jpg|alt=Several black rectangular NAND flash memory chips mounted on the green circuit board of a solid-state drive]] |- | colspan="2" style="text-align: center; padding: 2px 6px 6px 6px;" | <div style="color: #666; font-size: 0.82em;">NAND flash chips on the board of a solid-state drive — the most common form flash takes today</div> |- style="border-bottom: 1px solid #e6dff0;" ! scope="row" style="color: #6B4E9B; text-align: center; width: 36%;" | Type | Non-volatile semiconductor memory<ref name="kioxia-nand">"What is NAND Flash Memory?" ''Kioxia'' (official). [https://www.kioxia.com/en-jp/rd/technology/nand-flash.html kioxia.com]. Retrieved July 2026.</ref> |- style="border-bottom: 1px solid #e6dff0;" ! scope="row" style="color: #6B4E9B; text-align: center;" | Invented | 1984 (NOR); 1987 (NAND)<ref name="kioxia-hist">"Technology Development History." ''Kioxia'' (official). [https://www.kioxia.com/en-jp/rd/technology/history.html kioxia.com]. Retrieved July 2026.</ref> |- style="border-bottom: 1px solid #e6dff0;" ! scope="row" style="color: #6B4E9B; text-align: center;" | Inventor | Fujio Masuoka, at Toshiba<ref name="kioxia-hist" /><ref name="chm-nvm">Laws, David. "Pioneers of Semiconductor Non-Volatile Memory (NVM): The First Four Decades." ''Computer History Museum'', May 18, 2020. [https://computerhistory.org/blog/pioneers-of-semiconductor-non-volatile-memory-nvm-the-first-four-decades/ computerhistory.org]. Retrieved July 2026.</ref> |- style="border-bottom: 1px solid #e6dff0;" ! scope="row" style="color: #6B4E9B; text-align: center;" | Cell | One transistor with an isolated charge store<ref name="kioxia-nand" /> |- style="border-bottom: 1px solid #e6dff0;" ! scope="row" style="color: #6B4E9B; text-align: center;" | Two types | NOR (random access, code)<br>NAND (dense, bulk storage)<ref name="micron-guide">"NOR | NAND Flash Guide." ''Micron Technology'' (official), 2024. [https://assets.micron.com/adobe/assets/urn:aaid:aem:e98bc653-e42d-45a7-9b8c-03cb3d488f05/renditions/original/as/nor-nand-flash-guide.pdf micron.com]. Retrieved July 2026.</ref> |- | colspan="2" | {{Collapse|text="'''[ More details ▾ ]'''"|color="#6B4E9B"|style="width:100%;"}} |- style="border-bottom: 1px solid #e6dff0;" ! scope="row" style="color: #6B4E9B; text-align: center; width: 36%;" | Erased in | Blocks, not bytes<ref name="micron-tn29">"NAND Flash 101: An Introduction to NAND Flash," technical note TN-29-19. ''Micron Technology'' (official). [https://user.eng.umd.edu/~blj/CS-590.26/micron-tn2919.pdf micron.com]. Retrieved July 2026.</ref> |- style="border-bottom: 1px solid #e6dff0;" ! scope="row" style="color: #6B4E9B; text-align: center;" | Bits per cell | 1 (SLC) to 4 (QLC) in production<ref name="sandisk-qlc">"What Is QLC?" ''SanDisk'' (official). [https://www.sandisk.com/topics/ssd/what-is-qlc sandisk.com]. Retrieved July 2026.</ref> |- style="border-bottom: 1px solid #e6dff0;" ! scope="row" style="color: #6B4E9B; text-align: center;" | Structure | 3D, with hundreds of stacked layers<ref name="skhynix-321">"SK hynix Starts Mass Production of World-First 321-High NAND." ''SK hynix Newsroom'' (official), November 21, 2024. [https://news.skhynix.com/en/sk-hynix-starts-mass-production-of-world-first-321-high-nand/ news.skhynix.com]. Retrieved July 2026.</ref> |- style="border-bottom: 1px solid #e6dff0;" ! scope="row" style="color: #6B4E9B; text-align: center;" | Sold as | SSDs, UFS, eMMC, SD cards, USB drives<ref name="micron-guide" /> |- ! scope="row" style="color: #6B4E9B; text-align: center;" | Main makers | [[Samsung Electronics]]<br>Kioxia · SanDisk<br>[[SK hynix]] · [[Solidigm]]<br>[[Micron Technology]]<ref name="tf-nand1q26">"1Q26 NAND Flash Revenue Rises 83.7% QoQ." ''TrendForce'', May 25, 2026. [https://www.trendforce.com/presscenter/news/20260525-13058.html trendforce.com]. Retrieved July 2026.</ref> {{Endcollapse}} |} '''Flash memory''' is a kind of computer memory that keeps its contents when the power is switched off, and that can be erased and rewritten electrically. It is the storage inside every smartphone, memory card, USB stick and solid-state drive, and it has largely replaced the spinning hard disk in personal computers.<ref name="micron-guide" /><ref name="kioxia-nand" /> Unlike [[Dynamic random-access memory|DRAM]], which forgets everything the instant it loses power, flash holds data for years without any electricity at all.<ref name="kioxia-nand" /> Each cell is a single transistor with an extra store of charge sealed inside its insulating layers. Adding or removing electrons from that store changes the voltage at which the transistor switches on, and the chip reads a cell by testing which way it behaves. Because the store is surrounded by insulator, the charge stays put with the power off — that is what makes the memory non-volatile.<ref name="kioxia-nand" /><ref name="cai">Cai, Yu, Saugata Ghose, Erich F. Haratsch, Yixin Luo and Onur Mutlu. "Error Characterization, Mitigation, and Recovery in Flash-Memory-Based Solid-State Drives." ''Proceedings of the IEEE'', vol. 105 no. 9, September 2017. [https://arxiv.org/pdf/1706.08642 arxiv.org]. Retrieved July 2026.</ref> The name comes from how it is erased. Flash gives up the ability to rewrite one byte at a time, and instead wipes a large block all at once. That sounds like a step backwards, but it removed the extra transistor each cell had needed, which shrank the cell to a single transistor and cut the cost per bit dramatically.<ref name="spectrum">"Chip Hall of Fame: Toshiba NAND Flash Memory." ''IEEE Spectrum'', June 30, 2017. [https://spectrum.ieee.org/chip-hall-of-fame-toshiba-nand-flash-memory spectrum.ieee.org]. Retrieved July 2026.</ref><ref name="kioxia-hist" /> Cheapness is the whole point of flash, and every design decision in it follows from that. Flash was invented by Fujio Masuoka at Toshiba, who presented the first version in 1984 and the far denser NAND arrangement in 1987.<ref name="kioxia-hist" /><ref name="sakui">Sakui, Koji. "Professor Fujio Masuoka's Passion and Patience Toward Flash Memory." ''IEEE Solid-State Circuits Magazine'', Fall 2013. [https://unisantis.com/wp-content/uploads/2020/12/Prof.FujioMasuoka-PassionAndPatienceTowardFlashMemory.pdf ieee.org]. Retrieved July 2026.</ref> The market it created is now enormous. Flash revenue reached US$69.7 billion in 2025, and TrendForce projects US$147.3 billion for 2026 as artificial-intelligence data centres buy storage faster than the industry can build it.<ref name="tf-year">"Memory Market to Reach US$551.6 Billion in 2026." ''TrendForce'', January 22, 2026. [https://www.trendforce.com/presscenter/news/20260122-12893.html trendforce.com]. Retrieved July 2026.</ref> == How it works == === The cell === A flash cell is an ordinary transistor with one addition: a second gate, buried in the insulator between the control gate and the current-carrying channel, with no electrical connection to anything.<ref name="kioxia-nand" /><ref name="msoe">"Memory — Flash," CE 3101 course notes. Milwaukee School of Engineering, April 2022. [https://faculty-web.msoe.edu/johnsontimoj/CE3101/files3101/memory_flash.pdf msoe.edu]. Retrieved July 2026.</ref> Electrons pushed into that hidden store partly cancel the voltage applied from outside, so the transistor needs a higher voltage than usual before it will conduct. Reading a cell means applying a test voltage and seeing whether current flows.<ref name="kioxia-nand" /><ref name="cai" /> The original design used a conducting layer, called a floating gate. Newer chips use charge-trap flash instead, holding the electrons in an insulating silicon nitride layer. An insulating store cannot leak its charge sideways into a neighbouring cell, which is what allowed the industry to keep packing cells closer together.<ref name="samsung-ctf">"The Future of NAND Technology." ''Samsung Semiconductor'' (official), June 22, 2023. [https://semiconductor.samsung.com/news-events/tech-blog/the-future-of-nand-technology/ semiconductor.samsung.com]. Retrieved July 2026.</ref> === Writing and erasing === Getting electrons through a solid insulator relies on quantum mechanics. Under a strong enough electric field they tunnel straight through the barrier, an effect named Fowler–Nordheim tunnelling. NAND flash uses it for both writing and erasing; NOR flash writes by firing energetic electrons at the store instead, and erases by tunnelling.<ref name="cai" /><ref name="macronix-pe">"Program/Erase Cycling Endurance and Data Retention in NOR Flash Memories," application note AN0291. ''Macronix'' (official), June 2014. [https://www.macronix.com/Lists/ApplicationNote/Attachments/1916/AN0291V2-ProgramErase%20Cycling%20Endurance%20and%20Data%20Retention%20in%20NOR%20Flash%20Memories.pdf macronix.com]. Retrieved July 2026.</ref><ref name="msoe" /> === Pages and blocks === This is the structural fact that shapes everything built on flash. A chip is read and written a page at a time, typically 8 to 16 kilobytes, but it can only be erased a whole block at a time, and a block holds hundreds of pages.<ref name="cai" /><ref name="micron-tn29" /> Writing can only turn bits one way; returning them requires an erase.<ref name="micron-tn29" /> The consequence is that data cannot be changed where it sits. To alter a few bytes, the drive writes a fresh copy somewhere else, marks the old page invalid, and deals with the mess later.<ref name="cai" /> Everything awkward about flash — the controller software, the wear management, the sudden slowdowns on a full drive — traces back to this one rule. === Bits per cell === A cell does not have to hold just one bit. By charging the store to several distinguishable levels, a manufacturer can read more than one bit out of the same transistor. Single-level cells hold one bit, multi-level two, triple-level three and quad-level four; a five-bit version needs 32 separate voltage levels and has been demonstrated but is not widely sold.<ref name="sandisk-qlc" /><ref name="toms-plc">Pires, Francisco. "Solidigm Introduces Industry-First PLC NAND for Higher Storage Densities." ''Tom's Hardware'', August 10, 2022. [https://www.tomshardware.com/news/solidigm-plc-nand-ssd tomshardware.com]. Retrieved July 2026.</ref> Each extra bit buys roughly a third more capacity from the same silicon, which is why almost all consumer storage is now triple- or quad-level.<ref name="sandisk-qlc" /> The cost is that the voltage levels sit closer together, so the cell tolerates less drift, wears out sooner and is slower to write.<ref name="sandisk-qlc" /><ref name="cai" /> == NOR and NAND == Masuoka's two designs differ in how the cells are wired together, and they ended up serving quite different markets. NOR flash connects each cell so that it can be reached on its own. That allows true random access to any byte, and a processor can run code directly out of a NOR chip without copying it into memory first — the reason NOR is still used for the boot firmware in cars, industrial controllers and network equipment. It reads in a fraction of a microsecond but is comparatively bulky, and parts run from about 128 megabits to 2 gigabits.<ref name="micron-guide" /><ref name="micron-tn29" /> NAND wires cells in series, in strings, which removes most of the contacts and makes each cell about 60% smaller.<ref name="micron-tn29" /> The price is that data must be reached serially and in pages rather than bytes, so NAND takes tens of microseconds to produce its first byte. In exchange it is enormously denser and cheaper, reaching terabits per chip, and it is what all bulk storage is built from.<ref name="micron-tn29" /><ref name="micron-guide" /> The speed gap to other technologies is wide in both directions. NAND reads take around 25 microseconds and writes several hundred, against tens of nanoseconds for DRAM and around ten milliseconds for a mechanical hard disk.<ref name="micron-tn29" /><ref name="mit">"Computation Structures," lecture 14.1: The Memory Hierarchy. Massachusetts Institute of Technology OpenCourseWare, Spring 2017. [https://ocw.mit.edu/courses/6-004-computation-structures-spring-2017/pages/c14/c14s1/ ocw.mit.edu]. Retrieved July 2026.</ref> Flash therefore sits in the gap between memory and disk, closer to memory in speed and closer to disk in price. == Wear and reliability == Flash wears out. Every erase drives electrons through the thin oxide layer around the charge store, and each pass leaves a little damage behind. Traps accumulate in the oxide, the cell holds charge less reliably, and eventually the block has to be retired.<ref name="cai" /><ref name="macronix-endurance">"Endurance and Retention of NAND Flash," application note AN0339. ''Macronix'' (official), October 2014. [https://www.macronix.com/Lists/ApplicationNote/Attachments/1920/AN0339V1-Endurance%20and%20Retention%20of%20NAND%20Flash.pdf macronix.com]. Retrieved July 2026.</ref> Manufacturers rate parts in program–erase cycles. Single-level NAND is specified at about 100,000 and older two-bit parts at around 5,000; flat three-bit parts managed roughly 1,000, though stacked designs have raised that figure considerably.<ref name="micron-tn29" /><ref name="macronix-endurance" /><ref name="cai" /> Three other effects degrade stored data. Reading one row nudges the charge in its neighbours, and so does writing; and charge simply leaks away over time, faster when the chip is hot. The margins are startlingly small — a cell in a leading-edge planar chip stored only about a hundred electrons.<ref name="cai" /> Manufacturers generally specify ten years of retention for NAND.<ref name="macronix-endurance" /> A drive is therefore mostly software. Its controller runs a flash translation layer, which maps the addresses the computer uses onto wherever the data physically sits. That layer spreads writes evenly across the chips so no block wears out early, collects scattered valid pages together so blocks can be freed, and keeps spare capacity in reserve that the user never sees.<ref name="cai" /> The TRIM command lets the operating system tell the drive which data it has deleted, so the controller stops carefully preserving files that no longer exist.<ref name="kingston-trim">"The Importance of Garbage Collection and TRIM Processes for SSD Performance." ''Kingston Technology'' (official), July 2022. [https://www.kingston.com/en/blog/pc-performance/ssd-garbage-collection-trim-explained kingston.com]. Retrieved July 2026.</ref> All of that housekeeping means a drive writes more to the flash than the computer asked it to, a ratio known as write amplification.<ref name="cai" /> Raw flash is also error-prone by design, and every drive corrects errors continuously. The older BCH codes have given way to LDPC codes, which tolerate roughly three times the raw error rate for the same final reliability — a necessity as cells became less dependable.<ref name="cai" /><ref name="ldpc">Zhao, Kai, ''et al.'' "LDPC-in-SSD: Making Advanced Error Correction Codes Work Effectively in Solid State Drives." ''USENIX Conference on File and Storage Technologies (FAST '13)'', 2013. [https://www.usenix.org/system/files/conference/fast13/fast13-final125.pdf usenix.org]. Retrieved July 2026.</ref> == History == === Before flash === Non-volatile memory existed before flash but was awkward to use. The erasable programmable read-only memory, invented by Dov Frohman at Intel in 1971, stored charge on a floating gate and was erased by shining ultraviolet light through a quartz window in the chip package.<ref name="chm-eprom">"1971: Reusable Programmable ROM Introduces Iterative Design Flexibility." ''The Silicon Engine'', Computer History Museum. [https://www.computerhistory.org/siliconengine/reusable-programmable-rom-introduces-iterative-design-flexibility/ computerhistory.org]. Retrieved July 2026.</ref> Electrically erasable versions followed at the end of the 1970s and removed the light source, but they needed two transistors per cell in order to select individual bytes, which made them expensive.<ref name="chm-eprom" /><ref name="spectrum" /> === Invention at Toshiba === Fujio Masuoka was responsible for memory design at Toshiba when, in 1980, he put a small team to work on a cheaper non-volatile cell.<ref name="sakui" /><ref name="spectrum" /> His answer was to abandon byte-by-byte erasing. If the whole chip could be wiped at once, the select transistor was unnecessary, and one transistor per cell was enough.<ref name="spectrum" /> He presented the design at the IEEE International Electron Devices Meeting in San Francisco in December 1984.<ref name="sakui" /><ref name="chm-nvm" /> The name was suggested by a colleague, Shoji Ariizumi, who said that wiping the whole chip at once reminded him of a camera flash.<ref name="sakui" /><ref name="chm-nvm" /> Toshiba did not pursue the 1984 design, which was hard to manufacture.<ref name="chm-nvm" /> Masuoka returned in 1987 with the NAND arrangement, presented at that year's IEDM in Washington, which strung cells together to cut the cell area much further.<ref name="sakui" /><ref name="kioxia-hist" /> Toshiba was slow to back him. The company only committed to production after Intel launched a commercial NOR flash chip in 1988 and demonstrated that a market existed.<ref name="spectrum" /><ref name="chm-flashback">"Flashback: A Story of Flash Memory." ''Computer History Museum'', April 16, 2009. [https://computerhistory.org/events/flashback-story-flash-memory/ computerhistory.org]. Retrieved July 2026.</ref> Toshiba brought out the first commercial NAND chip, holding four megabits, in 1991.<ref name="kioxia-hist" /> Masuoka left for a professorship at Tohoku University in 1994 and later sued Toshiba over his share of the proceeds, settling in 2006 for a one-off payment of ¥87 million.<ref name="chm-revolution">"Fujio Masuoka." ''Revolution: The First 2000 Years of Computing'', Computer History Museum. [https://www.computerhistory.org/revolution/memory-storage/8/256 computerhistory.org]. Retrieved July 2026.</ref><ref name="spectrum" /> He received the IEEE Morris N. Liebmann Memorial Award in 1997 and the Honda Prize in 2018.<ref name="ieee-awards">''IEEE Awards: Complete Past and Present Recipient List''. ''Institute of Electrical and Electronics Engineers'' (official). [https://corporate-awards.ieee.org/wp-content/uploads/complete-past-and-present-recipient-list-2020.pdf ieee.org]. Retrieved July 2026.</ref><ref name="honda">"The Honda Prize 2018 Awarded to Dr. Fujio Masuoka." ''Honda'' (official), September 28, 2018. [https://global.honda/en/newsroom/news/2018/c180928beng.html global.honda]. Retrieved July 2026.</ref> === Commercial take-off === The other founding company was SunDisk, later SanDisk, started in 1988 by Eli Harari with Sanjay Mehrotra and Jack Yuan. Harari's patent that year covered not just a cell but a complete storage system, with a controller that found and worked around defective cells — the idea that made flash usable as a disk replacement.<ref name="chm-nvm" /><ref name="chm-ssd">"1991: Solid State Drive module demonstrated." ''The Storage Engine'', Computer History Museum. [https://www.computerhistory.org/storageengine/solid-state-drive-module-demonstrated/ computerhistory.org]. Retrieved July 2026.</ref> The company built a prototype solid-state drive for IBM in 1991.<ref name="chm-ssd" /> Consumer formats followed. SanDisk introduced CompactFlash in 1994 and it quickly became the standard card for digital cameras.<ref name="chm-1994">"Timeline of Computer History: 1994." ''Computer History Museum''. [https://www.computerhistory.org/timeline/1994/ computerhistory.org]. Retrieved July 2026.</ref> Toshiba announced its own card format in 1995.<ref name="toshiba-ssfdc">"Toshiba's Innovative 'Card-in-Card' Concept Brings Versatility of Floppy Disks to Flash Memory Cards." ''Toshiba'' (official), May 15, 1995. [https://www.global.toshiba/ww/news/corporate/1995/05/pr1501.html global.toshiba]. Retrieved July 2026.</ref> Panasonic, SanDisk and Toshiba then founded the SD Association in January 2000 to promote a smaller card of their joint design; the first SD cards held eight megabytes.<ref name="sda">"About the SDA." ''SD Association'' (official). [https://www.sdcard.org/about-sda/ sdcard.org]. Retrieved July 2026.</ref><ref name="sandisk-sd">Lystrup, Owen. "An Enduring Legacy: The SD Card at 25." ''SanDisk'' (official), July 30, 2025. [https://www.sandisk.com/company/newsroom/blogs/2025/an-enduring-legacy-the-the-sd-card-at-25 sandisk.com]. Retrieved July 2026.</ref> The USB flash drive appeared around 2000, and who invented it is still disputed. Teams at M-Systems in Israel, Trek 2000 in Singapore, Netac in China and IBM all have claims, with patent filings within months of one another.<ref name="spectrum-usb">Stevens, Hallam. "Who Really Invented the Thumb Drive?" ''IEEE Spectrum'', December 10, 2022. [https://spectrum.ieee.org/thumb-drive spectrum.ieee.org]. Retrieved July 2026.</ref> Toshiba shipped the first two-bit-per-cell NAND in 2001, beginning the long trade of endurance for capacity.<ref name="kioxia-hist" /> Portable music players and then smartphones turned flash into a mass-market commodity; Apple's first iPhone in 2007 ran on it, and the company signed long-term supply agreements to secure it.<ref name="eweek">Preimesberger, Chris. "1987: Toshiba Launches NAND Flash." ''eWeek'', April 11, 2012. [https://www.eweek.com/storage/1987-toshiba-launches-nand-flash/ eweek.com]. Retrieved July 2026.</ref> == Going vertical == By around 2010 flat NAND was running out of room. Shrinking a cell left it holding too few electrons to read reliably, and packed cells so close that each interfered with its neighbours.<ref name="samsung-vnand">"Samsung Starts Mass Producing Industry's First 3D Vertical NAND Flash." ''Samsung'' (official newsroom), August 6, 2013. [https://news.samsung.com/global/samsung-starts-mass-producing-industrys-first-3d-vertical-nand-flash news.samsung.com]. Retrieved July 2026.</ref> The industry's answer was to stop shrinking and start stacking, building the strings of cells vertically through the wafer instead of laying them out flat. Toshiba described the approach in 2007 under the name BiCS.<ref name="kioxia-bics">"3D Flash Memory 'BiCS FLASH'." ''Kioxia'' (official). [https://americas.kioxia.com/en-us/business/memory/bics.html kioxia.com]. Retrieved July 2026.</ref> Samsung was first to mass production, announcing 3D V-NAND with 24 stacked layers and 128 gigabits per die in August 2013.<ref name="samsung-vnand" /> Layer counts have climbed steeply ever since. [[SK hynix]] began making a 321-layer three-bit chip in November 2024 and a 321-layer four-bit version in August 2025, and has said it aims to reach 375 layers by the end of 2026.<ref name="skhynix-321" /><ref name="skhynix-qlc">"SK hynix Begins Mass Production of 321-Layer QLC NAND Flash." ''SK hynix Newsroom'' (official), August 25, 2025. [https://news.skhynix.com/en/sk-hynix-begins-mass-production-of-321-layer-qlc-nand-flash/ news.skhynix.com]. Retrieved July 2026.</ref><ref name="tf-375">"SK hynix Advances DRAM and NAND Roadmap; 375-Layer NAND at Year End." ''TrendForce'', June 11, 2026. [https://www.trendforce.com/news/2026/06/11/news-sk-hynix-advances-dram-and-nand-roadmap-targets-3x-wafer-output-by-2034-375-layer-nand-at-year-end/ trendforce.com]. Retrieved July 2026.</ref> Kioxia and SanDisk began sampling a 332-layer generation in July 2026.<ref name="bics10">"Kioxia and SanDisk Begin Production of 10th-Generation 3D Flash Memory." ''Kioxia'' (official), July 3, 2026. [https://www.kioxia.com/en-jp/about/news/2026/20260703-1.html kioxia.com]. Retrieved July 2026.</ref> Stacking brought a second change. Rather than build the control circuitry on the same wafer as the memory, makers now often build the two separately, each on the process that suits it, and bond the wafers together. Kioxia calls its version CMOS directly Bonded to Array and YMTC calls its own Xtacking.<ref name="bics10" /><ref name="ymtc">"About Xtacking." ''YMTC'' (official). [https://www.ymtc.com/en/technicalintroduction.html ymtc.com]. Retrieved July 2026.</ref> Samsung presented a design with more than 400 active layers at a conference in early 2025, using wafer bonding for the first time.<ref name="v10">Shilov, Anton. "Samsung Unveils 10th-Gen V-NAND: 400 Layers, 5.6 GT/s and Hybrid Bonding." ''Tom's Hardware'', February 2025. [https://www.tomshardware.com/pc-components/ssds/samsung-unveils-10th-gen-v-nand-400-layers-5-6-gt-s-and-hybrid-bonding tomshardware.com]. Retrieved July 2026.</ref> == Products == === Solid-state drives === The solid-state drive packages flash chips with a controller and presents itself to a computer as a disk. Early drives used the SATA interface designed for hard disks; the ones sold today mostly speak NVMe over PCI Express, a protocol written for flash rather than inherited from spinning platters.<ref name="micron-guide" /> Micron began mass-producing the first drives on the sixth generation of PCI Express in February 2026, at 28 gigabytes per second reading.<ref name="micron-9650">"Micron 9650 SSD: The World's First PCIe Gen6 SSD Reaches a New Shipping Milestone." ''Micron Technology'' (official), February 11, 2026. [https://www.micron.com/about/blog/storage/ssd/micron-9650-ssd-the-worlds-first-pcie-gen6-ssd-reaches-a-new-shipping-milestone micron.com]. Retrieved July 2026.</ref> Data-centre drives have grown very large. Kioxia announced a 245-terabyte drive in July 2025, built from a 32-high stack of four-bit dies — a single unit holding more than most organisations owned in total a decade ago.<ref name="kioxia-lc9">"Kioxia Announces 245.76 TB NVMe SSD." ''Kioxia'' (official), July 22, 2025. [https://apac.kioxia.com/en-apac/business/news/2025/20250722-1.html kioxia.com]. Retrieved July 2026.</ref> === Mobile and embedded storage === Phones and tablets use Universal Flash Storage, a JEDEC standard that bundles the flash and its controller into one small package. JEDEC published version 5.0 in February 2026, raising the ceiling to 10.8 gigabytes per second.<ref name="ufs5">"JEDEC Announces Updates to Universal Flash Storage (UFS) and Memory Interface Standards." ''JEDEC'' (official), February 26, 2026. [https://www.jedec.org/news/pressreleases/jedec%C2%AE-announces-updates-universal-flash-storage-ufs-and-memory-interface-0 jedec.org]. Retrieved July 2026.</ref> Cheaper and simpler devices still use the older eMMC standard, which has not been revised since 2015.<ref name="emmc">"JEDEC Announces Publication of e·MMC Standard Update v5.1." ''JEDEC'' (official), February 24, 2015. [https://www.jedec.org/news/pressreleases/jedec-announces-publication-emmc-standard-update-v51 jedec.org]. Retrieved July 2026.</ref> === Cards and removable drives === SD and microSD cards remain the standard removable format. The SD Association's current specification, published in October 2023, defines an Express family that runs the card over PCI Express at up to four gigabytes per second.<ref name="sd91">"SD 9.1 Specification Introduces New Speed Classes and Next-Level Performance Features." ''SD Association'' (official), October 27, 2023. [https://www.sdcard.org/press/thoughtleadership/sd-9-1-specification-introduces-new-speed-classes-and-next-level-performance-features-2/ sdcard.org]. Retrieved July 2026.</ref> CompactFlash in its original form is long retired; its association now maintains the CFexpress standards used in professional cameras.<ref name="cfa">"Card Types." ''CompactFlash Association'' (official). [https://compactflash.org/card-types/ compactflash.org]. Retrieved July 2026.</ref> === Storage built for AI === The newest category is aimed squarely at machine learning, where the bottleneck is feeding data to an accelerator fast enough. [[SK hynix]] set out a three-line plan in October 2025: one product tuned for speed, one for cheap bulk capacity, and one that stacks NAND vertically in the manner of high-bandwidth memory.<ref name="ain">"SK hynix Presents Next-Generation NAND Storage Product Strategy at OCP 2025." ''SK hynix Newsroom'' (official), October 26, 2025. [https://news.skhynix.com/en/sk-hynix-presents-next-generation-nand-storage-product-strategy-at-ocp-2025/ news.skhynix.com]. Retrieved July 2026.</ref> That last design, High Bandwidth Flash, is being standardised jointly with SanDisk through an Open Compute Project workstream announced in February 2026.<ref name="hbf">"SanDisk and SK hynix Begin Global Standardization of High Bandwidth Flash." ''SanDisk'' (official), February 25, 2026. [https://www.sandisk.com/company/newsroom/press-releases/2026/2026-02-25-sandisk-and-sk-hynix-begin-global-standardization-of-next-generation-memory-solution-high-bandwidth-flash-hbf sandisk.com]. Retrieved July 2026.</ref> Kioxia has taken a different route, announcing in March 2026 a drive that lets a graphics processor reach flash directly.<ref name="kioxia-gp">"Kioxia Announces GP Series Super High IOPS SSD." ''Kioxia'' (official), March 16, 2026. [https://americas.kioxia.com/en-us/business/news/2026/ssd-20260316-1.html kioxia.com]. Retrieved July 2026.</ref> == The industry == Five companies make almost all the world's flash. In the first quarter of 2026 [[Samsung Electronics]] led with US$13.5 billion of revenue, ahead of the [[SK hynix]] group including [[Solidigm]] at US$7.5 billion, with Kioxia, [[Micron Technology]] and SanDisk each near US$6 billion.<ref name="tf-nand1q26" /> China's YMTC is the significant outsider, holding roughly 8% of supply at the end of 2024 and expanding despite having been placed on the United States export blacklist in December 2022.<ref name="ymtc-toms">Shilov, Anton. "China's YMTC Moves to Break Free of US Sanctions." ''Tom's Hardware'', 2025. [https://www.tomshardware.com/pc-components/ssds/chinas-ymtc-moves-to-break-free-of-u-s-sanctions-by-building-production-line-with-homegrown-tools-aims-to-capture-15-percent-of-nand-market-by-late-2026 tomshardware.com]. Retrieved July 2026.</ref> The line-up was redrawn in the middle of the decade. Kioxia, the direct descendant of Masuoka's Toshiba division, listed on the Tokyo Stock Exchange in December 2024.<ref name="kioxia-ipo">"Kioxia Finalizes IPO Price; SK hynix Poised to Become Third-Largest Shareholder." ''TrendForce'', December 10, 2024. [https://www.trendforce.com/news/2024/12/10/news-kioxia-finalizes-ipo-price-sk-hynix-poised-to-become-third-largest-shareholder/ trendforce.com]. Retrieved July 2026.</ref> SanDisk was separated from Western Digital and began trading on its own in February 2025.<ref name="sandisk-spin">"SanDisk Celebrates Nasdaq Listing After Completing Separation." ''SanDisk'' (official), February 24, 2025. [https://www.sandisk.com/company/newsroom/press-releases/2025/sandisk-celebrates-nasdaq-listing-after-completing-separation sandisk.com]. Retrieved July 2026.</ref> [[SK hynix]] completed its purchase of [[Intel]]'s flash business in March 2025, having run the acquired drive operation as Solidigm since 2021.<ref name="solidigm">Shilov, Anton. "Intel and SK hynix Close NAND Business Deal." ''Tom's Hardware'', March 2025. [https://www.tomshardware.com/pc-components/ssds/intel-and-sk-hynix-close-nand-business-deal-intel-gets-usd1-9-billion-sk-hynix-gets-ip-and-employees tomshardware.com]. Retrieved July 2026.</ref> Kioxia and SanDisk, which have shared factories in Japan for years, extended that partnership to 2034 in January 2026.<ref name="jv">"Kioxia and SanDisk Extend Yokkaichi and Kitakami Joint Venture." ''Kioxia'' (official), January 30, 2026. [https://www.kioxia.com/en-jp/about/news/2026/20260130-1.html kioxia.com]. Retrieved July 2026.</ref> Flash has always been a cyclical business, and the current cycle is a shortage. AI servers now account for more than 40% of demand for flash bits, while phone and notebook production is falling. TrendForce puts the supply gap at 4% to 5%, with no return to balance before late 2027.<ref name="tf-shortage">"NAND Flash Undersupply to Persist Through 2026." ''TrendForce'', July 21, 2026. [https://www.trendforce.com/presscenter/news/20260721-13148.html trendforce.com]. Retrieved July 2026.</ref> Prices have moved accordingly: contract prices for the single-level NAND used in industrial equipment rose 130% to 150% in the first half of 2026 alone.<ref name="tf-slc">"Specialty Memory Contract Prices Surge in 1H26." ''TrendForce'', June 16, 2026. [https://www.trendforce.com/presscenter/news/20260616-13102.html trendforce.com]. Retrieved July 2026.</ref> == See also == * [[Dynamic random-access memory]] * [[NAND flash memory]] * [[High Bandwidth Memory]] * [[SK hynix]] * [[Samsung Electronics]] * [[Micron Technology]]